upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 112
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 3
112
Interrupt/Exception Source
Name
Non-maskable interrupts
(NMI)
Maskable interrupt
Software
exception
Exception trap (ILGOP)
Debug trap
Initial Value
Table 3-8
Table 3-9
TRAP0n
(n = 0 to F
TRAP1n
(n = 0 to F
(5)
H
H
ECR - Interrupt/exception source register
The 32-bit ECR register displays the exception codes if an exception or an
interrupt has occurred. With the exception code, the interrupt/exception source
can be identified.
For a list of interrupts/exceptions and corresponding exception codes, see
Table 3-9 on page 112.
0000 0000
ECR register contents
The following table lists the exception codes.
Interrupt/execution codes
If an interrupt (maskable or non-maskable) is acknowlegded during instruction
execution, generally, the address of the instruction following the one being
executed is saved to the saving registers, except when an interrupt is
acknowledged during execution of one of the following instructions:
• load instructions (SLD.B, SLD.BU, SLD.H, SLD.HU, SLD.W)
• divide instructions (DIV, DIVH, DIVU, DIVHU)
Preliminary User’s Manual U17566EE1V2UM00
31
)
)
position
31 to 16
15 to 0
Bit
Trigger
NMI0
input
NMI1
input
NMI2
input
refer to
“Interrupt
Controller
(INTC)“
on
page 187
TRAP
instruction
TRAP
instruction
Illegal
instruction
code
DBTRAP
instruction
H
. This register is cleared by any reset.
Bit name
FECC
Classification
Interrupt
Interrupt
Interrupt
Interrupt
Exception
Exception
Exception
Exception
FECC
EICC
Function
Exception code of non-maskable interrupt (NMI)
Exception code of exception or maskable interrupts
Exception
Code
0010
0020
0030
refer to
“Interrupt
Controller
(INTC)“ on
page 187
004n
005n
0060
0060
26 25
H
H
H
H
H
H
H
Handler
Address
0000 0010
0000 0020
0000 0030
• higher 16 bits:
• lower 16 bits:
0000 0040
0000 0050
0000 0060
0000 0060
0000
exception code
H
CPU System Functions
H
H
H
H
H
H
H
EICC
Value
restored to
EIPC/FEPC
next PC
(see Note)
next PC
(see Note)
next PC
(see Note)
next PC
(see Note)
next PC
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