upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 691
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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CAN Controller (CAN)
After reset: 0000H R/W
CnINTS
(11)
15
0
7
0
CnINTS - CANn module interrupt status register
The CnINTS register indicates the interrupt status of the CAN module.
(a) Read
Preliminary User’s Manual U17566EE1V2UM00
Interrupt status
CINTS5 to
CINTS0
CINTS5
CINTS4
CINTS3
CINTS2
CINTS1
CINTS0
Set CIE2
Set CIE1
Set CIE0
bit
0
1
0
1
0
1
0
1
Address: CnINTS <CnRBaseAddr> + 058
14
0
6
0
Other than above
Other than above
Other than above
CINTS5
CAN interrupt status bit
No related interrupt source event is pending.
A related interrupt source event is pending.
Related interrupt source event
Wakeup interrupt from CAN sleep mode
Arbitration loss interrupt
CAN protocol error interrupt
CAN error status interrupt
Interrupt on completion of reception of valid message frame to
message buffer m
Interrupt on normal completion of transmission of message frame
from message buffer m
13
0
5
Clear CIE2
Clear CIE1
Clear CIE0
1
0
1
0
1
0
CINTS4
12
0
4
Setting of CIE2 bit
CIE2 bit is cleared to 0.
CIE2 bit is set to 1.
CIE2 bit is not changed.
Setting of CIE1 bit
CIE1 bit is cleared to 0.
CIE1 bit is set to 1.
CIE1 bit is not changed.
Setting of CIE0 bit
CIE0 bit is cleared to 0.
CIE0 bit is set to 1.
CIE0 bit is not changed.
CINTS3
11
0
3
H
CINTS2
10
0
2
Note
CINTS1
9
0
1
Chapter 19
CINTS0
8
0
0
691
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