upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 152
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 4
152
Bit position
6 to 4
1
Initial Value
Table 4-14
Address
Access
WTPS[2:0]
Bit name
WTSEL1
(2)
TCC - Watch Timer clock control register
The 8-bit TCC register determines the Watch Timer and LCD controller clock
source and the setting of the associated clock dividers. This register can be
changed only once after Power-On-Clear reset or external RESET.
This register can be read/written in 8-bit units.
Writing to this register is protected by a special sequence of instructions.
Please refer to “PHCMD - Command protection register” on page 140 for
details.
FFFF F836
00
a)
TCC register contents (1/2)
Preliminary User’s Manual U17566EE1V2UM00
H
Function
LCDCLK clock divider selection:
WTCLK (Watch Timer clock) divider setting:
R
. The register is initialized at power-on and by external RESET.
7
0: WTCLK = LCDCLK.
1: WTCLK = LCDCLK / 2.
0
a
These bits may be written, but write is ignored.
WTPS2
0
0
0
0
1
1
1
1
H
WTPS2
.
R/W
6
WTPS1
0
0
1
1
0
0
1
1
WTPS1
R/W
5
WTPS0
WTPS0
R/W
0
1
0
1
0
1
0
1
4
Clock divider setting
1
1 / 2
1 / 4
1 / 8
1 / 16
1 / 32
1 / 64
1 / 128
R
3
0
a
WTSOS
R/W
2
WTSEL1
Clock Generator
R/W
1
WTSEL0
R/W
0
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