upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 121
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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CPU System Functions
Table 3-13
Table 3-14
Note
(3)
(4)
(5)
Internal VSB flash area (µPD70F3426 only)
The µPD70F3426 provides additional flash memory, accessible via the VSB
(V850 System Bus).
Internal VSB flash memory
Internal VSB RAM area (µPD70F3426 only)
The µPD70F3426 provides additional RAM, accessible via the VSB (V850
System Bus).
Internal VSB RAM
Fixed peripheral I/O area
The 4 KB area between addresses 03FF F000
as the fixed peripheral I/O area. Accesses to these addresses are passed over
to the NPB bus (internal bus).
The following registers are memory-mapped to the peripheral I/O area:
• All registers of peripheral functions
• Registers of timers
• Configuration registers of interrupt, DMA, bus and memory controllers
• Configuration registers of the clock controller
For a list of all peripheral I/O registers, see “Special Function Registers“ on
page 891.
1.
2.
3.
4.
Preliminary User’s Manual U17566EE1V2UM00
Device
µPD70F3426
Device
µPD70F3426
Because the physical address space covers 64 MB, the address bits
A[31:26] are not considered. Thus, this address space can also be
addressed via the area FFFF 0000
advantage that the area can be indirectly addressed by an offset and the
zero base r0.
Therefore, in this manual, all addresses of peripheral I/O registers in the
4 KB peripheral I/O area are given in the range FFFF F000
FFFF FFFF
The fixed peripheral I/O area is mirrored to the upper 4 KB of the
programmable peripheral I/O area PPA - regardless of the base address of
the PPA. If data is written to one area, it appears also in the other area.
Program fetches cannot be executed from any peripheral I/O area.
Word registers, that means 32-bit registers, are accessed in two half word
accesses. The lower two address bits are ignored.
H
Flash size Address range
RAM size
24 KB
1 MB
instead of 03FF F000
0010 0000
Block
Number
0
1
H
H
Size
12 KB
12 KB
H
to 001F FFFF
to FFFF FFFF
to 03FF FFFF
H
and 03FF FFFF
Address
0060 0000
0060 3000
H
H
H
. This has the
.
H
H
– 0060 2FFF
– 0060 5FFF
H
H
to
is provided
Chapter 3
H
H
121
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