upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 372
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 11
372
External event count signal
INTTPnCC0 signal
TPnCCR0 register
INTTPnCC0 signal
TPnCCR0 register
16-bit counter
TPnCE bit
16-bit counter
(3)
TPnCE bit
FFFFH
0000H
Operation timing in external event count mode
(a) Operation if TPnCCR0 register is set to 0000H
(b) Operation if TPnCCR0 register is set to FFFFH
Preliminary User’s Manual U17566EE1V2UM00
If the TPnCCR0 register is set to 0000H, the INTTPnCC0 signal is
generated each time the valid signal of the external event count signal has
been detected.
The 16-bit counter is always 0000H.
If the TPnCCR0 register is set to FFFFH, the 16-bit counter counts to
FFFFH each time the valid edge of the external event count signal has
been detected. The 16-bit counter is cleared to 0000H in synchronization
with the next count-up timing, and the INTTPnCC0 signal is generated. At
this time, the TPnOPT0.TPnOVF bit is not set.
FFFFH
External event
count signal
interval
External event
count signal
interval
0000H
External event
count signal
interval
External event
count signal
interval
FFFFH
0000H
0000H
16-bit Timer/Event Counter P (TMP)
External event
count signal
interval
External event
count signal
interval
0000H
0000H
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