upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 585
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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I
2
Condition for clearing (STDn = 0)
• When a stop condition is detected
• At the rising edge of the next byte’s first clock
• Cleared by LRELn = 1 (communication save)
• When the IICEn bit changes from 1 to 0 (operation
• After reset
Condition for clearing (SPDn = 0)
• At the rising edge of the address transfer byte’s first
• When the IICEn bit changes from 1 to 0 (operation
• After reset
C Bus (IIC)
following address transfer
stop)
SPDn
clock following setting of this bit and detection of a
start condition
stop)
STDn
0
1
0
1
Start condition was not detected.
Start condition was detected. This indicates that the address transfer period is in effect
Stop condition was not detected.
Stop condition was detected. The master device’s communication is terminated and the bus is
released.
Preliminary User’s Manual U17566EE1V2UM00
Start condition detection
Stop condition detection
Condition for setting (STDn = 1)
• When a start condition is detected
Condition for setting (SPDn = 1)
• When a stop condition is detected
Chapter 18
585
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