upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 719
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
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CAN Controller (CAN)
19.10.4 Multi buffer receive block function
Caution
The multi buffer receive block (MBRB) function is used to store a block of data
in two or more message buffers sequentially with no CPU interaction, by
setting the same ID to two or more message buffers with the same message
buffer type.
Suppose, for example, the same message buffer type is set to 10 message
buffers, message buffers 10 to 19, and the same ID is set to each message
buffer. If the first message whose ID matches an ID of the message buffers is
received, it is stored in message buffer 10. At this point, the DN bit of message
buffer 10 is set, prohibiting overwriting the message buffer when subsequent
messages are received.
When the next message with a matching ID is received, it is received and
stored in message buffer 11. Each time a message with a matching ID is
received, it is sequentially (in the ascending order) stored in message buffers
12, 13, and so on. Even when a data block consisting of multiple messages is
received, the messages can be stored and received without overwriting the
previously received matching-ID data.
Whether a data block has been received and stored can be checked by setting
the CnMCTRLm.IE bit of each message buffer. For example, if a data block
consists of k messages, k message buffers are initialized for reception of the
data block. The IE bit in message buffers 0 to (k-2) is cleared to 0 (interrupts
disabled), and the IE bit in message buffer k-1 is set to 1 (interrupts enabled).
In this case, a reception completion interrupt occurs when a message has
been received and stored in message buffer k-1, indicating that MBRB has
become full. Alternatively, by clearing the IE bit of message buffers 0 to (k-3)
and setting the IE bit of message buffer k-2, a warning that MBRB is about to
overflow can be issued.
The basic conditions of storing receive data in each message buffer for the
MBRB are the same as the conditions of storing data in a single message
buffer.
1.
2.
3.
4.
Preliminary User’s Manual U17566EE1V2UM00
MBRB can be configured for each of the same message buffer types.
Therefore, even if a message buffer of another MBRB whose ID matches but
whose message buffer type is different has a vacancy, the received
message is not stored in that message buffer, but instead discarded.
MBRB does not have a ring buffer structure. Therefore, after a message is
stored in the message buffer having the highest number in the MBRB
configuration, a newly received message will not be stored in the message
buffer having the lowest message buffer number.
MBRB operates based on the reception and storage conditions; there are
no settings dedicated to MBRB, such as function enable bits. By setting the
same message buffer type and ID to two or more message buffers, MBRB is
automatically configured.
With MBRB, “matching ID” means “matching ID after mask”. Even if the ID
set to each message buffer is not the same, if the ID that is masked by the
mask register matches, it is considered a matching ID and the buffer that
has this ID is treated as the storage destination of a message.
Chapter 19
719
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