upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 832
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 23
Write to this register
832
Read from this
register
Note
A write operation to this register sets the busy flag LBCTL0.BYF0 immediately.
If there is no LCD bus transfer in progress (LBCTL0.TPF0 = 0), the data is
copied to the write buffer and LBCTL0.BYF0 is cleared.
If there is a transfer going on (LBCTL0.TPF0 = 1), the data is not copied to the
write buffer until the transfer has completed. As soon as the transfer is
complete, the data is copied to the write buffer and LBCTL0.BYF0 is cleared.
A transfer via the LCD Bus Interface starts as soon as the LBDATA0 register is
copied to the write buffer. This is indicated by the interrupt INTLCD that
becomes active, provided that LBCTL0.TCIS0 = 0.
A read operation from this register initiates a read transfer via the LCD Bus
Interface. The data that is read from the register is always the data that was
received during the previous transfer from the LCD Bus Interface.
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
Every access must address the base address of the LBDATA0 register.
Access to the individual bytes within the register is prohibited.
LBCTL0.BYF0 must be zero when accessing this register.
LCD Bus Interface (LCD-I/F)
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