upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 263
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
- Current page: 263 of 930
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Bus and Memory Control (BCU, MEMC)
Bit position
6 to 4
2 to 0
Initial Value
Table 7-9
Address
Access
SUWL[2:0]
VSWL[2:0]
Bit name
(2)
VSWC - Internal peripheral function wait control register
The 8-bit VSWC register defines the wait states inserted when accessing
peripheral special function registers via the internal bus. Both address setup
and data wait states are based on the system clock.
This register can be read/written in 8-bit or 1-bit units.
FFFF F06E
77
VSWC register contents
Preliminary User’s Manual U17566EE1V2UM00
H
Function
Address setup wait for internal bus:
Data wait for internal bus:
R/W
7
0
SUWL2
VSWL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
H
SUWL2
R/W
6
SUWL1
VSWL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SUWL1
R/W
5
SUWL0
VSWL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SUWL0
R/W
4
Number of address setup wait states
0
1 CPU system clock (VBCLK)
2 CPU system clock (VBCLK)
3 CPU system clock (VBCLK)
4 CPU system clock (VBCLK)
5 CPU system clock (VBCLK)
6 CPU system clock (VBCLK)
7 CPU system clock (VBCLK)
Number of data wait states
0
1 CPU system clock (VBCLK)
2 CPU system clock (VBCLK)
3 CPU system clock (VBCLK)
4 CPU system clock (VBCLK)
5 CPU system clock (VBCLK)
6 CPU system clock (VBCLK)
7 CPU system clock (VBCLK)
R/W
3
0
VSWL2
R/W
2
VSWL1
R/W
1
Chapter 7
VSWL0
R/W
0
263
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