upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 293

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Bus and Memory Control (BCU, MEMC)
A[23:0] (output)
Figure 7-18
BCC.BCk[1:0]
CSk (output)
WAIT (input)
D[15:0] (I/O)
WR (output)
RD (output)
D[7:0] (I/O)
BCLK
Note
(2)
00B
Read operation with address setup wait states and idle state insertion
Reading page ROM with address setup wait states and idle state
insertion
Register settings:
• BCTm.BTk0 = 1 (connected external device is page ROM)
• ASC.ACk[1:0] = 01
• DWCm.DWk[2:0] = 000
• PRC.PRW[2:0] = 000
• BCC.BCk[1:0] : see Figure 7-18
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
access inserted)
access inserted)
The circles indicate the sampling timing.
The broken line indicates the high-impedance state (bus is not driven).
TASW
Off-page address
T1
Data
B
(one address setup wait state inserted)
T2
B
(no programmable data wait states for on-page
B
(no programmable data wait states for off-page
TASW
01B
TO1
On-page address
Data
TO2
TI
Chapter 7
293

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