upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 285
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Bus and Memory Control (BCU, MEMC)
Figure 7-11
A[23:0] (output)
CSk (output)
D]31:0] (I/O)
WAIT (input)
WR (output)
RD (output)
7.6.1 Writing to external devices
Note
(1)
BCLK
This section shows typical sequences of writing data to external devices.
Write with external wait cycle
Timing: write data
Register settings:
• BCTm.BTk0 = 0 (connected external device is SRAM or external I/O)
• ASC.ACk[1:0] = 00
• DWCm.DWk[2:0] = 000
• BCC.BCk[1:0] = 00
1.
2.
The data has to be stable at the rising edge of the WR signal. For details refer
to the Electrical Target Specification.
Preliminary User’s Manual U17566EE1V2UM00
The circles indicate the sampling timing.
The broken line indicates the high-impedance state (bus is not driven).
T1
Address
B
B
(no address setup wait states inserted)
(no idle states inserted)
T2
B
Data
(no programmable data wait states inserted)
T1
Address
TW
Data
T2
Chapter 7
285
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