DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 120
DK-DEV-5SGXEA7/ES
Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Specifications of DK-DEV-5SGXEA7/ES
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
- Current page: 120 of 530
- Download datasheet (16Mb)
3–4
Variable Precision DSP Block Resource Descriptions
Figure 3–1. Variable Precision DSP Block Architecture for Stratix V Devices
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
COEFSELA[2..0]
COEFSELB[2..0]
SUB_COMPLEX
LOADCONST
ACCUMULATE
datab_0[17..0]
dataa_0[17..0]
datab_1[17..0]
dataa_1[17..0]
NEGATE
18
18
18
18
scanin [17..0]
scanout[17..0]
The Quartus
operation mode of the multipliers. After making the appropriate parameter settings
with the MegaWizard
configures the variable precision DSP block.
The Stratix V variable precision DSP block consists of the following elements:
■
■
■
■
■
■
Figure 3–1
DSP block.
Input register bank
Pre-adder and coefficient select
Multipliers
Compressors and accumulator
Systolic registers
64-bit adder and output register bank
Pre-Adder
Pre-Adder
+/-
+/-
Coefficient
Coefficient
shows a detailed overall architecture of the Stratix V variable precision
Internal
Internal
®
Registers
II software includes megafunctions that you can use to control the
Systolic
™
Mult_H
Mult_L
Plug-In Manager, the Quartus II software automatically
x
x
ACLR[1..0]
CLK[2..0]
ENA[2..0]
Adder
+/-
+/-
Chapter 3: Variable Precision DSP Blocks in Stratix V Devices
+/-
chainin[63..0]
Register
Systolic
Variable Precision DSP Block Resource Descriptions
Chainout adder/
accumulator
+
May 2011 Altera Corporation
chainout[63..0]
Constant
64
Result[65..0]
Related parts for DK-DEV-5SGXEA7/ES
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV FPGA 2AGX260 W/6.375G TX
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV MAX V 5M570Z
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEVELOPMENT STRATIX III
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV ARRIA GX 1AGX60N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT STARTER CYCLONE IV GX
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: