DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 322

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

9–42
Figure 9–24. Enabling Compression Bitstreams in Compiler Settings for Stratix V
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
Configuration Data Decompression
1
Stratix V devices support configuration data decompression, which saves
configuration memory space and may shorten the configuration time. This feature
allows you to store compressed configuration data in the configuration or other
memory devices and transmit this compressed data to the Stratix V devices. During
configuration, the Stratix V device decompresses the data in real time and programs
its SRAM cells. The data decompression is done on-the-fly during configuration and
does not require an additional processing time.
Preliminary data indicates that compression typically reduces the configuration data
size by 30 to 55% based on the designs used. This reduces the storage requirement
capacity for the flash memory. The decompression feature is supported in all
configuration schemes except JTAG.
In FPP, enabling the decompression feature requires a different DCLK-to-DATA[] ratio.
For more information, refer to
There are two ways to enable compression for Stratix V data—before design
compilation (in the Compiler Settings menu) and after design compilation (in the
Convert Programming Files window).
To enable compression in the project’s Compiler Settings menu, follow these steps:
1. On the Assignments menu, click Device to bring up the Settings dialog box.
2. After selecting your Stratix V device, open the Device and Pin Options dialog
3. In the Configuration settings panel, turn on the Generate compressed bitstreams
box.
option (refer to
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Stratix V Devices
Figure
9–24).
“Fast Passive Parallel Configuration” on page
Configuration Data Decompression
May 2011 Altera Corporation
9–9.