DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 348

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

10–10
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
Table 10–10
CRC calculation for Stratix V devices.
Table 10–10. CRC Calculation Time—Preliminary
Stratix V GX
Stratix V GS
Stratix V GT
Stratix V E
Family
lists the minimum and maximum estimated clock frequency time for each
5SGXA3
5SGXA4
5SGXA5
5SGXA7
5SGXA9
5SGXAB
5SGXB5
5SGXB6
5SGSD2
5SGSD3
5SGSD4
5SGSD5
5SGSD6
5SGSD8
5SGTC5
5SGTC7
Device
5SEEB
5SEE9
Minimum Time (µs)
2.71
2.71
3.57
3.57
4.85
4.85
3.71
3.71
3.57
3.57
TBD
TBD
2.97
2.97
4.53
4.53
4.85
4.85
Chapter 10: SEU Mitigation in Stratix V Devices
May 2011 Altera Corporation
Maximum Time (µs)
Error Detection Timing
5.42
5.42
7.14
7.14
9.70
9.70
7.42
7.42
7.14
7.14
5.94
5.94
9.06
9.06
9.70
9.70
TBD
TBD