DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 249
DK-DEV-5SGXEA7/ES
Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Specifications of DK-DEV-5SGXEA7/ES
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
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Chapter 7: External Memory Interfaces in Stratix V Devices
Memory Interface Pin Support
Table 7–2. Number of DQ/DQS Groups in Stratix V Devices per Side
May 2011 Altera Corporation
5SGXA3
5SGXA4
5SGXA5
5SGXA7
5SGXA9
5SGXAB
Device
780-pin FineLine BGA
1152-pin FineLine BGA
(with 24 transceivers)
1152-pin FineLine BGA
(with 36 transceivers)
1517-pin FineLine BGA
1152-pin FineLine BGA
(with 24 transceivers)
1152-pin FineLine BGA
(with 36 transceivers)
1517-pin FineLine BGA
(with 36 transceivers)
1517-pin FineLine BGA
(with 48 transceivers)
1932-pin FineLine BGA
1517-pin FineLine BGA
1932-pin FineLine BGA
Table 7–2
device.
Package
lists the number of DQ/DQS groups available per side in each Stratix V
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Left/Right
Bottom
Top
Side
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
(Note
x4
26
18
50
42
36
36
52
52
50
42
38
36
58
58
50
50
70
70
58
58
70
70
0
0
0
0
0
0
0
0
0
0
0
(2)
1)—Preliminary (Part 1 of 2)
x8/x9
13
25
21
18
18
26
26
25
21
19
18
29
29
25
25
35
35
29
29
35
35
0
9
0
0
0
0
0
0
0
0
0
0
x16/x18
12
10
12
12
12
10
14
14
12
12
16
16
14
14
16
16
0
6
4
0
0
8
8
0
0
0
8
8
0
0
0
0
0
x32/x36
0
1
0
0
4
3
0
2
2
0
4
4
0
4
3
0
2
2
0
6
6
0
4
5
0
6
6
0
6
6
0
6
6
7–5
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