DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 349

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Chapter 10: SEU Mitigation in Stratix V Devices
Software Support
Software Support
Recovering From CRC Errors
Document Revision History
Table 10–11. Document Revision History
May 2011 Altera Corporation
May 2011
December 2010
July 2010
Date
The Quartus II software, starting with version 10.0, supports the error detection CRC
feature for Stratix V devices. Enabling this feature in the Device and Pin Options
dialog box generates the CRC_ERROR output to the optional dual-purpose CRC_ERROR
pin.
To enable the error detection feature using CRC, perform the following steps:
1. Open the Quartus II software and load a project using a Stratix V device.
2. On the Assignments menu, click Device. The Device dialog box appears.
3. Click Device and Pin Options. The Device and Pin Options dialog box appears.
4. In the Category list, click Error Detection CRC.
5. Turn on Enable Error Detection CRC_ERROR pin.
6. By default, the Quartus II software sets the CRC_ERROR pin as output open-drain
7. In the Divide error check frequency by box, enter a valid divisor as shown in
8. To enable or disable the on-chip error correction feature, turn on or turn off Enable
9. Click OK.
The system that the Stratix V device resides in must control device reconfiguration.
After detecting an error on the CRC_ERROR pin, strobing the nCONFIG signal low directs
the system to perform the reconfiguration at a time when it is safe.
When the data bit is rewritten with the correct value by reconfiguring the device, the
device functions correctly.
While soft errors are uncommon in Altera
applications may require a design to account for these errors.
Table 10–11
Version
when you enable the error detection CRC circuitry. You can set this pin to be an
output by turning off the Enable open-drain on CRC_ERROR pin.
Table 10–8 on page
internal scrubbing.
1.2
1.1
1.0
lists the revision history for this chapter.
■
■
■
No changes to the content of this chapter for the Quartus II software 10.1.
Initial release.
Chapter moved to volume 2 for the 11.0 release.
Updated
Minor text edits.
10–8.
Table 10–9
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
and
Table

devices, certain high-reliability
10–10.
Changes
10–11