DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 139
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
DK-DEV-5SGXEA7/ES
Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Specifications of DK-DEV-5SGXEA7/ES
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
- Current page: 139 of 530
- Download datasheet (16Mb)
Chapter 3: Variable Precision DSP Blocks in Stratix V Devices
Software Support
Software Support
Document Revision History
Table 3–6. Document Revision History
May 2011 Altera Corporation
May 2011
December 2010
July 2010
Date
f
Version
Altera provides two methods for implementing various modes of the
Stratix V variable precision DSP block in a design: Using the Quartus II software and
HDL inferring.
The following Quartus II megafunctions are supported for the
Stratix V variable precision DSP blocks implementation:
■
■
■
■
Alternatively, you can infer the Stratix V variable precision DSP block from the HDL
source code. You can use the HDL templates files that are available in the Quartus II
software version 11.0 and later to get the Stratix V variable precision DSP blocks
inferred. With either method, the Quartus II software maps the functionality to the
variable precision DSP blocks during compilation.
For instructions about using the megafunctions and the templates files, refer to the
Quartus II Software
Table 3–6
1.2
1.1
1.0
LPM_MULT
ALTMULT_ADD
ALTMULT_ACCUM
ALTMULT_COMPLEX
■
■
■
■
■
■
■
No changes to the content of this chapter for the Quartus II software 10.1.
Initial release.
Updated chapter for Quartus II software 11.0 release.
Chapter moved to volume 2 for the 11.0 release.
Updated
Added
Updated all figures in the chapter.
Added
Updated
lists the revision history for this chapter.
Table
Figure
Table
“Software Support”
Help.
3–3.
3–3.
3–1,
Table
3–2, and
section.
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
Table
Changes
3–5.
3–23
Related parts for DK-DEV-5SGXEA7/ES
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-DEV-2AGX125N](/photos/28/41/284154/dk-dev-2agx125n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer:
Altera
Datasheet:
![DK-DEV-3CLS200N](/photos/9/24/92409/dk-dev-3cls200n_tmb.jpg)
Part Number:
Description:
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SE530N](/photos/28/41/284157/dk-dev-4se530n_tmb.jpg)
Part Number:
Description:
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer:
Altera
Datasheet:
![DK-DEV-2AGX260N](/photos/28/41/284175/dk-dev-2agx260n_tmb.jpg)
Part Number:
Description:
KIT DEV FPGA 2AGX260 W/6.375G TX
Manufacturer:
Altera
Datasheet:
![DK-DEV-5M570ZN](/photos/18/31/183180/dk-dev-5m570zn_tmb.jpg)
Part Number:
Description:
KIT DEV MAX V 5M570Z
Manufacturer:
Altera
Datasheet:
![DK-DEV-3SL150N](/photos/9/20/92079/dk-dev-3sl150n_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX III
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SGX230N](/photos/28/41/284156/dk-dev-4sgx230n_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
![DK-DEV-1AGX60N](/photos/9/31/93181/mfgdk-dev-1agx60n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA GX 1AGX60N
Manufacturer:
Altera
Datasheet:
![DK-DEV-4CGX150N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT STARTER CYCLONE IV GX
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SGX530N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: