DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 178

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

5–2
I/O Standard Support
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
1
■
■
The following information is applicable to all Stratix V variants, unless noted
otherwise.
Stratix V devices support a wide range of industry I/O standards.
I/O standards for Stratix V devices, as well as the typical applications they support.
These devices support V
Table 5–1. Stratix V I/O Standards and Applications (Part 1 of 2)
3.3-V LVTTL/LVCMOS (1),
2.5-V LVCMOS
1.8-V LVCMOS
1.5-V LVCMOS
1.2-V LVCMOS
SSTL-2 Class I and II
SSTL-18 Class I and II
SSTL-15 Class I and II
SSTL-15
SSTL-135
SSTL-125
SSTL-12
HSTL-18 Class I and II
HSTL-15 Class I and II
HSTL-12 Class I and II
HSUL-12
Differential SSTL-2 Class I and II
Differential SSTL-18 Class I and II
Differential SSTL-15 Class I and II
Differential HSTL-18 Class I and II
Differential HSTL-15 Class I and II
Differential HSTL-12 Class I and II
Differential SSTL-15
Differential SSTL-135
Differential SSTL-125
Differential SSTL-12
Differential HSUL-12
LVDS
RSDS
Programmable pre-emphasis
Programmable differential output voltage (V
I/O Standard
CCIO
(2)
voltage levels of 3.0, 2.5, 1.8, 1.5, 1.35, 1.25, and 1.2 V.
OD
)
High-speed communications
QDR II/QDR II+/RLDRAM II
Chapter 5: I/O Features in Stratix V Devices
Typical Applications
QDR II/RLDRAM II
LPDDR2 SDRAM
LPDDR2 SDRAM
Flat panel display
General purpose
General purpose
General purpose
General purpose
General purpose
General purpose
DDR3U SDRAM
Clock interfaces
Clock interfaces
Clock interfaces
DDR3U SDRAM
DDR3L SDRAM
DDR3L SDRAM
DDR2 SDRAM
DDR3 SDRAM
DDR3 SDRAM
DDR2 SDRAM
DDR3 SDRAM
DDR3 SDRAM
DDR SDRAM
DDR SDRAM
RLDRAM III
RLDRAM III
May 2011 Altera Corporation
Table 5–1
I/O Standard Support
lists the