DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 42
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
DK-DEV-5SGXEA7/ES
Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Specifications of DK-DEV-5SGXEA7/ES
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
- Current page: 42 of 530
- Download datasheet (16Mb)
Chapter 2: DC and Switching Characteristics for Stratix V Devices
Switching Characteristics
Switching Characteristics
Table 2–19. Transceiver Specifications for Stratix V GX and GS Devices—Preliminary (Part 1 of 3)
May 2011 Altera Corporation
Reference Clock
Supported I/O
Standards
Input frequency from
REFCLK input pins
Duty cycle
Spread-spectrum
modulating clock
frequency
Spread-spectrum
downspread
On-chip termination
resistors
V
V
R
Transceiver Clocks
fixedclk clock
frequency
ICM
ICM
REF
(AC coupled)
(DC coupled)
Description
Symbol/
Transceiver Performance Specifications
This section provides performance characteristics of the Stratix V core and periphery
blocks for commercial grade devices.
These characteristics can be designated as Preliminary or Final.
■
■
This section describes transceiver performance specifications.
Table 2–19
Receiver Detect
Preliminary characteristics are created using simulation results, process data, and
other known parameters. The title of these tables show the designation as
“Preliminary.”
Final numbers are based on actual silicon characterization and testing. The
numbers reflect the actual performance of the device under worst-case silicon
process, voltage, and junction temperature conditions. There are no designations
on finalized tables.
PCIe reference
PCI Express
standard for
Conditions
HCSL I/O
(PCIe
clock
PCIe
PCIe
—
—
—
—
—
1.2 V PCML, 1.4 V PCML, 1.5 V PCML, 2.5 V PCML, Differential LVPECL, LVDS, and HCSL
®
lists the Stratix V GX and GS transceiver specifications.
)
®
Min
250
40
45
30
—
—
—
—
1000/850
Speed Grade
Commercial
-0.5%
2000
±1%
0 to
100
125
Typ
—
—
—
—
–1
(2)
Max
710
550
55
33
—
—
—
—
Stratix V Device Handbook Volume 1: Overview and Datasheet
Commercial/Industrial
Min
250
40
45
30
—
—
—
—
1000/850
Speed Grade
-0.5%
2000
±1%
0 to
100
125
Typ
—
—
—
—
–2
(2)
Max
710
550
55
33
—
—
—
—
Commercial/Industrial
Min
250
40
45
30
—
—
—
—
(Note 1)
1000/850
Speed Grade
-0.5%
2000
±1%
0 to
100
125
Typ
—
—
—
—
–3
(2)
Max
710
550
55
33
—
—
—
—
2–14
MHz
MHz
Unit
kHz
mV
mV
—
%
Related parts for DK-DEV-5SGXEA7/ES
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-DEV-2AGX125N](/photos/28/41/284154/dk-dev-2agx125n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer:
Altera
Datasheet:
![DK-DEV-3CLS200N](/photos/9/24/92409/dk-dev-3cls200n_tmb.jpg)
Part Number:
Description:
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SE530N](/photos/28/41/284157/dk-dev-4se530n_tmb.jpg)
Part Number:
Description:
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer:
Altera
Datasheet:
![DK-DEV-2AGX260N](/photos/28/41/284175/dk-dev-2agx260n_tmb.jpg)
Part Number:
Description:
KIT DEV FPGA 2AGX260 W/6.375G TX
Manufacturer:
Altera
Datasheet:
![DK-DEV-5M570ZN](/photos/18/31/183180/dk-dev-5m570zn_tmb.jpg)
Part Number:
Description:
KIT DEV MAX V 5M570Z
Manufacturer:
Altera
Datasheet:
![DK-DEV-3SL150N](/photos/9/20/92079/dk-dev-3sl150n_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX III
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SGX230N](/photos/28/41/284156/dk-dev-4sgx230n_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
![DK-DEV-1AGX60N](/photos/9/31/93181/mfgdk-dev-1agx60n_tmb.jpg)
Part Number:
Description:
KIT DEV ARRIA GX 1AGX60N
Manufacturer:
Altera
Datasheet:
![DK-DEV-4CGX150N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT STARTER CYCLONE IV GX
Manufacturer:
Altera
Datasheet:
![DK-DEV-4SGX530N](/images/manufacturer_photos/0/0/40/altera_tmb.jpg)
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: