DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 431

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Chapter 2: Transceiver Clocking in Stratix V Devices
Internal Clocking
Figure 2–12. Receiver 10G PCS Clocking
Note to
(1) Only available in the central clock dividers of channel 1 and channel 4 in a transceiver bank.
Figure 2–13. Receiver Standard PCS Clocking
Note to
(1) Only available in the central clock dividers of channel 1 and channel 4 in a transceiver bank.
May 2011 Altera Corporation
rx_coreclkin
rx_coreclkin
rx_clkout/tx_clkout
Fabric
CMU PLL
Fabric
CMU PLL
FPGA
FPGA
rx_clkout / tx_clkout
(From the ×1 Clock Lines)
(From the ×1 Clock Lines)
Figure
Figure
Serial Clock
Serial Clock
Receiver Clocking
2–12:
2–13:
f
Central/ Local Clock Divider
For an example of using the ×N clock lines, refer to the PCIe ×8 configuration in the
Transceiver Protocol Configurations in Stratix V Devices
Configurations in Stratix V Devices
Receiver clocking refers to the clocking architecture internal to the receiver channel of
a transceiver.
receiver PMA.
Figure 2–13
Central/ Local Clock Divider
Parallel and Serial Clocks (From the ×6 or ×N Clock Lines)
Parallel and Serial Clocks (From the ×6 or ×N Clock Lines)
shows clocking for the receiver standard PCS and receiver PMA.
Figure 2–12
Clock Divider
Clock Divider
/2
shows clocking for the receiver 10G PCS receiver and the
Parallel and Serial Clocks
(To the ×6 clock lines) (1)
Parallel and Serial Clocks
(To the ×6 clock lines) (1)
chapters.
Parallel Clock (from the clock divider)
Parallel Clock (Recovered)
Parallel Clock (Recovered)
Parallel Clock (from the clock divider)
Stratix V Device Handbook Volume 3: Transceivers
Parallel Clock
Serial Clock
Parallel and Serial Clocks
and
Parallel Clock
Serial Clock
Parallel and Serial Clocks
Receiver Standard PCS
Receiver 10G PCS
Transceiver Custom
To the Transmitter Channel
Recovered
recovered
To Transmitter
Channel
Receiver PMA
Receiver PMA
Clocks
clocks
Reference
Reference
Clock
Input
Clock
Input
2–15