DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 501

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Chapter 4: Transceiver Protocol Configurations in Stratix V Devices
XAUI
Figure 4–33. Channel Placement Guidelines in a XAUI Configuration
May 2011 Altera Corporation
Within a Transceiver Bank:
Spanning Transceiver Banks:
When you use a CMU PLL:
XAUI Ch 2
XAUI Ch 1
XAUI Ch 0
XAUI Ch 2
XAUI Ch 1
XAUI Ch 0
XAUI Ch 2
XAUI Ch 1
XAUI Ch 0
XAUI Ch 3
CMU PLL
XAUI Ch 3
CMU PLL
CMU PLL
XAUI Ch 3
When you use an ATX PLL:
Within a Transceiver Bank:
XAUI Ch 2
XAUI Ch 1
XAUI Ch 0
XAUI Ch 3
XAUI Ch 2
XAUI Ch 1
XAUI Ch 0
XAUI Ch 3
Stratix V Device Handbook Volume 3: Transceivers
4–45