DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 41

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

Chapter 2: DC and Switching Characteristics for Stratix V Devices
Electrical Characteristics
Table 2–18. Differential I/O Standard Specifications for Stratix V Devices—Preliminary
May 2011 Altera Corporation
PCML
2.5 V
LVDS
RSDS
(HIO)
Mini-
LVDS
(HIO)
LVPECL
Notes to
(1) The 1.4-V and 1.5-V PCML transceiver I/O standard specifications are described in
(2) RL range: 90
(3) For D
Standard
I/O
0.45 V; the maximum input voltage is 1.95 V.
Table
MAX
Power Consumption
2.375
2.375
2.375
2.375
2.375
> 700 Mbps, the minimum input voltage is 0.85 V; the maximum input voltage is 1.75 V. For F
Min
2–18:
f
1
Transmitter, receiver, and input reference clock pins of the high-speed transceivers use the PCML I/O standard. For

RL
V
CCIO
Typ

2.5
2.5
2.5
2.5
2.5
110  .
Altera offers two ways to estimate power consumption for a design—the Excel-based
Early Power Estimator and the Quartus
You typically use the interactive Excel-based Early Power Estimator before designing
the FPGA to get a magnitude estimate of the device power. The Quartus II PowerPlay
Power Analyzer provides better quality estimates based on the specifics of the design
after you complete place-and-route. The PowerPlay Power Analyzer can apply a
combination of user-entered, simulation-derived, and estimated signal activities that,
when combined with detailed circuit models, yields very accurate power estimates.
For more information about power estimation tools, refer to the
Estimator User Guide
Handbook.
(V)
transmitter, receiver, and reference clock I/O pin specifications, refer to
2.625
2.625
2.625
2.625
2.625
Max
Min
100
100
200
300
300
Condition Max
V
1.25 V
1.25 V
ID
V
V
CM
CM
—
—
—
(mV)
and the
=
=
600
—
—
—
—
—
PowerPlay Power Analysis
0.05
1.05
Min
0.3
0.4
0.6
1
Condition
700 Mbps
700 Mbps
V
®
ICM(DC)
D
D
II PowerPlay Power Analyzer feature.
Stratix V Device Handbook Volume 1: Overview and Datasheet
MAX
MAX
—
—
—
—
“Transceiver Performance Specifications” on page

>
(V)
1.325
Max
1.55
1.4
1.8
1.8
1.6
(3)
(3)
chapters in the Quartus II
0.247
0.247
0.25
Min
0.1
MAX
—
—
(Note 1)
V

OD
Table 2–19 on page
700 Mbps, the minimum input voltage is
(V)
PowerPlay Early Power
Typ Max
0.2
—
—
—
—
—
(2)
0.6
0.6
0.6
0.6
—
—
1.125
1.125
Min
0.5
—
—
1
2–14.
V
2–14.
OCM
1.25
1.25
2–13
Typ
1.2
1.2
—
—
(V)
(2)
1.375
1.375
Max
1.4
1.4
—
—