DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 500

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

4–44
Stratix V Device Handbook Volume 3: Transceivers
Transceiver Channel Placement Guidelines
Although the soft PCS implementation of the XAUI configuration has no placement
restrictions, if you plan on migrating to the hard PCS version in the future, you must
place the channels according to the guidelines that follow.
Figure 4–33
the ATX PLL to drive the XAUI link. This placement only applies when using the hard
PCS block in the transceiver. The current version of the Quartus II software (11.0)
implements the XAUI PCS in soft logic and therefore does not have any placement
restrictions. If you plan to use the XAUI hard PCS in future versions of the Quartus II
software, enure that your channels are placed in one of the configurations shown in
Figure
4–33.
shows the allowed channel placement when using either the CMU PLL or
Chapter 4: Transceiver Protocol Configurations in Stratix V Devices
May 2011 Altera Corporation
XAUI