DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 494

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

4–38
Figure 4–28. XAUI and XGMII Layers
Stratix V Device Handbook Volume 3: Transceivers
Presentation
Model Layers
Application
Transport
Data Link
Reference
Network
Physical
Session
OSI
XAUI is a specific physical layer implementation of the 10 Gigabit Ethernet link
defined in the IEEE 802.3ae-2002 specification. As shown in
PHY uses the XGMII interface to connect to the IEEE802.3 MAC and Reconciliation
Sublayer (RS). The IEEE 802.3ae-2002 specification requires the XAUI PHY link to
support a 10 Gbps data rate at the XGMII interface and four lanes each at 3.125 Gbps
at the PMD interface.
Figure 4–28
the OSI reference model.
shows the relationships between the XAUI PHY and other sublayers in
Optional
XGMII
Extender
Access/Collision Detect (CSMA/CD)
Media Access Control (MAC)
Logical Link Control (LLC)
LAN Carrier Sense Multiple
XGMII Extender Sublayer
XGMII Extender Sublayer
MAC Control (Optional)
Higher Layers
Reconciliation
Medium
10 Gb/s
Layers
PCS
PMA
PMD
Chapter 4: Transceiver Protocol Configurations in Stratix V Devices
Physical Layer Device
10 Gigabit Media Independent Interface
10 Gigabit Attachment Unit Interface
10 Gigabit Media Independent Interface
Medium Dependent Interface
Figure
May 2011 Altera Corporation
4–28, the XAUI
XAUI