DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 402

• Manufacturer Part Number: DK-DEV-5SGXEA7/ES
• Description: KIT DEV STRATIX V FPGA 5SGXEA7
• Manufacturer: Altera
• Series: Stratix® Vr
• Type: FPGAr

Specifications of DK-DEV-5SGXEA7/ES

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Stratix® V 5SGXEA7
• Other names: 544-2725

1–30
Stratix V Device Handbook Volume 3: Transceivers
Single-Width Mode
The byte serializer forwards the LSByte first, followed by the MSByte. The input data
width to the byte serializer depends on the channel width option. For example, in
single-width mode, assuming a channel width of 20, the byte serializer sends out the
least significant word tx_parallel_data[9:0] of the parallel data from the FPGA
fabric, followed by tx_parallel_data[19:10].
data widths of the byte serializer in single-width mode.
Table 1–11. Input and Output Data Width of the Byte Serializer in Single-Width Mode for Stratix V
Devices
Double-Width Mode
The operation in double-width mode is similar to that of single-width mode. For
example, assuming a channel width of 32, the byte serializer forwards
tx_parallel_data[15:0] first, followed by tx_parallel_data[31:16].
lists the input and output data widths of the byte serializer in double-width mode.
Table 1–12. Input and Output Data Width of the Byte Serializer in Double-Width Mode for
Stratix V Devices
If you select the 8B/10B Encoder option, the 8B/10B encoder uses the output from the
byte serializer. Otherwise, the byte serializer output is forwarded to the serializer.
8B/10B Encoder
This is only available in PCIe configurations. The 8B/10B encoder generates 10-bit
code groups from the 8-bit data and 1-bit control identifier.
8B/10B encoder in single-width mode.
Figure 1–25. 8B/10B Encoder in Single-Width Mode
Single-width mode
Double-width mode
Deserialization Width
Deserialization Width
Byte Serializer
From the
datain[7:0]
tx_datak
Input Data Width to the Byte
Input Data Width to the Byte
8B/10B Encoder
Serializer
Serializer
32
40
Chapter 1: Transceiver Architecture in Stratix V Devices
16
20
Table 1–11
To the Serializer
dataout[9:0]
lists the input and output
Figure 1–25
Output Data Width from the
Output Data Width from the
May 2011 Altera Corporation
Byte Serializer
Byte Serializer
Standard PCS Architecture
16
20
10
Table 1–12
8
shows the