DK-DEV-5SGXEA7/ES Altera, DK-DEV-5SGXEA7/ES Datasheet - Page 315
DK-DEV-5SGXEA7/ES
Manufacturer Part Number
DK-DEV-5SGXEA7/ES
Description
KIT DEV STRATIX V FPGA 5SGXEA7
Manufacturer
Altera
Series
Stratix® Vr
Type
FPGAr
Specifications of DK-DEV-5SGXEA7/ES
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Stratix® V 5SGXEA7
Other names
544-2725
- Current page: 315 of 530
- Download datasheet (16Mb)
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Stratix V Devices
JTAG Configuration
Figure 9–21. JTAG Configuration of a Single Device Using a Download Cable
Notes to
(1) Connect the pull-up resistor V
(2) If you only use JTAG configuration, connect nCONFIG to V
(3) The resistor value can vary from 1 k
(4) You must connect nCE to GND or drive it low for successful JTAG configuration.
May 2011 Altera Corporation
on your board. If you are using JTAG in conjunction with another configuration scheme, connect MSEL[4..0], nCONFIG and DCLK based on
the selected configuration scheme.
Figure
9–21:
f
V
CCPGM
Figure 9–21
Alternatively, you can use a microprocessor to program the device through the JTAG
interface. You can use JRunner as your software driver.
For more information about JRunner, refer to
Embedded Solution for PLD JTAG
CCPD
V
CCPGM
. For more information, refer to V
GND
to 10 k
shows the JTAG configuration of a single Stratix V device.
(2)
(2)
(2)
N.C.
. Perform signal integrity analysis to select the resistor value for your setup.
nCE
nCEO
nSTATUS
CONF_DONE
nCONFIG
MSEL[4..0]
DCLK
Stratix V Device
CCPGM
and MSEL[4..0] to GND. Pull DCLK either high or low, whichever is convenient
TRST
TDO
TMS
TCK
CCPD
TDI
Configuration.
Stratix V Device Handbook Volume 2: Device Interfaces and Integration
requirement in
V
CCPD
V
CCPD
(1)
V
(3)
(1)
CCPD
(3)
(1)
AN 414: The JRunner Software Driver: An
“V
CCPD
GND
Pin 1
Pin” on page
(JTAG Mode) (Top View)
10-Pin Male Header
Download Cable
GND
9–3.
V
CCPD
GND
(1)
9–35
Related parts for DK-DEV-5SGXEA7/ES
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV FPGA 2AGX260 W/6.375G TX
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV MAX V 5M570Z
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEVELOPMENT STRATIX III
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEV ARRIA GX 1AGX60N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT STARTER CYCLONE IV GX
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
KIT DEVELOPMENT STRATIX IV
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: