mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1037

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mcf51jf128

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mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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42.3.11 I2C SCL Low Timeout Register High (I2Cx_SLTH)
Addresses: I2C0_SLTH is FFFF_81C0h base + Ah offset = FFFF_81CAh
42.3.12 I2C SCL Low Timeout Register Low (I2Cx_SLTL)
Addresses: I2C0_SLTL is FFFF_81C0h base + Bh offset = FFFF_81CBh
42.4 Functional Description
This section provides a comprehensive functional description of the I2C module.
Freescale Semiconductor, Inc.
SSLT[15:8]
SSLT[7:0]
Reset
Field
Reset
Field
Read
7–0
Read
7–0
Write
Write
Bit
Bit
I2C1_SLTH is FFFF_81D0h base + Ah offset = FFFF_81DAh
I2C2_SLTH is FFFF_81E0h base + Ah offset = FFFF_81EAh
I2C3_SLTH is FFFF_81F0h base + Ah offset = FFFF_81FAh
I2C1_SLTL is FFFF_81D0h base + Bh offset = FFFF_81DBh
I2C2_SLTL is FFFF_81E0h base + Bh offset = FFFF_81EBh
I2C3_SLTL is FFFF_81F0h base + Bh offset = FFFF_81FBh
Most significant byte of SCL low timeout value that determines the timeout period of SCL low.
Least significant byte of SCL low timeout value that determines the timeout period of SCL low.
7
0
7
0
0
0
6
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
I2Cx_SLTH field descriptions
I2Cx_SLTL field descriptions
0
0
5
5
Preliminary
0
0
4
4
SSLT[15:8]
SSLT[7:0]
Description
Description
0
0
3
3
Chapter 42 Inter-Integrated Circuit (I2C)
0
0
2
2
0
0
1
1
0
0
0
0
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