mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1151

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor, Inc.
Reserved
Reserved
27–26
23–21
WSF
FWF
Field
SEF
FEF
FRF
FR
SR
25
24
20
19
18
17
16
This read-only bitfield is reserved and always has the value zero.
FIFO reset
Resets the FIFO pointers.
0
1
Software reset
When set, resets the internal receiver logic including the FIFO pointers. Software visible-registers are not
affected, except for the status registers.
0
1
This read-only bitfield is reserved and always has the value zero.
Word start flag
Indicates that the start of the configured word has been detected. Write a logic one to this register bit to
clear this flag.
0
1
Sync error flag
Indicates that an error in the externally-generated frame sync has been detected. Write a logic one to this
register bit to clear this flag.
0
1
FIFO error flag
Indicates that an enabled receive FIFO has overflowed. Write a logic one to this register bit to clear this
flag.
0
1
FIFO warning flag
Indicates that an enabled receive FIFO is full.
0
1
FIFO request flag
Indicates that the number of words in an enabled receive channel FIFO is greater than the receive FIFO
watermark.
No effect.
FIFO reset.
No effect.
Software reset.
Start of word not detected.
Start of word detected.
Sync error not detected.
Frame sync error detected.
Receive underrun not detected.
Receive underrun detected.
No enabled receive FIFO is full.
Enabled receive FIFO is full.
I2Sx_RCSR field descriptions (continued)
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Chapter 44 Integrated Interchip Sound (I2S) / Synchronous Audio Interface (SAI)
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Preliminary
Description
1151