mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 303

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

13.2.9 Service COP Register (SIM_SRVCOP)
Address: SIM_SRVCOP is FFFF_80C0h base + Bh offset = FFFF_80CBh
13.2.10 Oscillator 1 Control Register (SIM_OSC1)
Controls the OSC1 crystal oscillator.
Address: SIM_OSC1 is FFFF_80C0h base + Dh offset = FFFF_80CDh
Freescale Semiconductor, Inc.
COPCLKS
Reserved
SRVCOP
COPW
COPT
Field
Reset
Field
Reset
7–4
3–2
Read
7–0
Read
Write
Write
1
0
Bit
Bit
OSC1EN
This read-only bitfield is reserved and always has the value zero.
COP watchdog timeout
These write-once bits select the timeout period of the COP. The COPT field along with the COPCLKS bit
define the COP timeout period.
COP watchdog clock select
This write-once bit selects the clock source of the COP watchdog.
0
1
COP windowed mode
0
1
Refer to
7
0
7
0
Internal 1 kHz clock is source to COP (reset value).
Bus clock is source to COP.
Normal mode (reset value).
Windowed mode.
COP watchdog
0
0
0
6
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
SIM_SRVCOP field descriptions
SIM_COPC field descriptions
operation.
0
0
0
5
5
Preliminary
0
0
4
4
OSC1RANGE
SRVCOP
Description
Description
0
0
0
3
3
Chapter 13 System Integration Module (SIM)
OSC1HGO
0
0
2
2
OSC1EREFS
0
0
1
1
0
0
0
0
0
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