mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1085

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

43.3.19 UART FIFO Transmit Count (UARTx_TCFIFO)
This is a read only register that indicates how many datawords are currently in the
transmit buffer/FIFO. It may be read at anytime.
Addresses: UART0_TCFIFO is FFFF_8140h base + 14h offset = FFFF_8154h
Freescale Semiconductor, Inc.
TXWATER
TXCOUNT
Field
Reset
Field
7–0
Read
7–0
Write
Bit
UART1_TCFIFO is FFFF_8160h base + 14h offset = FFFF_8174h
Transmit Watermark
When the number of datawords in the transmit FIFO/buffer is equal to or less than the value in this
register field then an interrupt via S1[TDRE] or a DMA request via C5[TDMAS] will be generated as
determined by C5[TDMAS] and C2[TIE] fields. For proper operation the value in the TXWATER field must
be set to be less than the size of the transmit buffer/FIFO size as indicated by PFIFO[TXFIFOSIZE] and
PFIFO[TXFE].
Transmit Counter
The value in this register indicates the number of datawords that are in the transmit buffer/FIFO. If a
dataword is in the process of being transmitted (i.e. in the transmit shift register) it is not included in the
count. This value may be used in conjunction with the PFIFO[TXFIFOSIZE] field to calculate how much
room is left in the transmit buffer/FIFO.
7
0
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
UARTx_TWFIFO field descriptions
UARTx_TCFIFO field descriptions
0
5
Chapter 43 Universal Asynchronous Receiver/Transmitter (UART)
Preliminary
0
4
TXCOUNT
Description
Description
0
3
0
2
0
1
0
0
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