mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 562

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional Description
24.4.6.3 Bus Cycle Sizing
This section shows timing diagrams for various port size scenarios.
24.4.6.3.1 Bus Cycle Sizing—Byte Transfer, 8-bit Device, No Wait States
The following figure illustrates the basic byte read transfer to an 8-bit device with no wait
states:
The following figure shows the similar configuration for a write transfer. The data is
driven from the second clock on FB_AD[7:0].
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•
• The device tristates FB_AD[7:0] on the second clock and continues to drive address
• The external device returns the read data on FB_AD[7:0].
The address is driven on the full FB_AD[19:8] bus in the first clock.
on FB_AD[19:8] throughout the bus cycle.
FB_CLK
FB_A[Y]
FB_D[X]
FB_RW
FB_TS
FB_ALE
FB_CSn
FB_OEn
FB_BE/BWEn
FB_TA
FB_TSIZ[1:0]
Figure 24-18. Single Byte-Read Transfer
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Address
Preliminary
Address
TSIZ = 01
AA=1
AA=0
Data
AA=0
AA=1
Freescale Semiconductor, Inc.