mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 812

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory Map and Register Definition
Addresses: FTM0_C0SC is FFFF_8440h base + 5h offset = FFFF_8445h (refer to FTMx memory map for additional registers)
812
ELSB
CHIE
MSB
MSA
Reset
Field
CHF
Read
Write
7
6
5
4
3
Bit
ELSnB
0
0
1
1
Table 37-72. Dual Edge Capture Mode — Edge Polarity Selection
CHF
Channel Flag
Set by hardware when an event occurs on the channel. CHF is cleared by reading the CnSC register
while CHnF is set and then writing a 0 to the CHF bit. Writing a 1 to CHF has no effect.
If another event occurs between the read and write operations, the write operation has no effect;
therefore, CHF remains set indicating an event has occurred. In this case a CHF interrupt request is not
lost due to the clearing sequence for a previous CHF.
0
1
Channel Interrupt Enable
Enables channel interrupts.
0
1
Channel Mode Select
Used for further selections in the channel logic. Its functionality is dependent on the channel mode. See
the table in the register description.
MSB is write protected. It can be written only when MODE[WPDIS] = 1.
Channel Mode Select
Used for further selections in the channel logic. Its functionality is dependent on the channel mode. See
the table in the register description.
MSA is write protected. It can be written only when MODE[WPDIS] = 1.
Edge or Level Select
The functionality of ELSB and ELSA depends on the channel mode. See the table in the register
description.
7
0
0
No channel event has occurred.
A channel event has occurred.
Disable channel interrupts. Use software polling.
Enable channel interrupts.
CHIE
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
FTMx_CnSC field descriptions
ELSnA
Table continues on the next page...
0
1
0
1
MSB
0
5
Preliminary
MSA
0
4
Description
Channel Port Enable
ELSB
Disabled
Enabled
Enabled
Enabled
0
3
ELSA
0
2
Freescale Semiconductor, Inc.
Rising and falling edges
Detected Edges
Falling edge
Rising edge
0
0
1
No edge
DMA
0
0

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