mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 472

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map/Register Definitions
21.7.1 OSC Control Register (OSCx_CR)
After OSC is enabled and starts generating the clocks, the configurations such as low
power and frequency range, must not be changed.
Addresses: OSC1_CR is FFFF_8120h base + 0h offset = FFFF_8120h
472
FFFF_8120
FFFF_8130
Absolute
address
EREFSTEN
ERCLKEN
Reserved
Reserved
(hex)
SC2P
SC4P
Reset
Field
Read
Write
7
6
5
4
3
2
Bit
OSC2_CR is FFFF_8130h base + 0h offset = FFFF_8130h
ERCLKEN
OSC Control Register (OSC1_CR)
OSC Control Register (OSC2_CR)
External Reference Enable
Enables external reference clock (OSCERCLK).
0
1
This read-only bit is reserved and always has the value zero.
External Reference Stop Enable
Controls whether or not the external reference clock (OSCERCLK) remains enabled when MCU enters
Stop mode.
0
1
This read-only bit is reserved and always has the value zero.
Oscillator 2 pF Capacitor Load Configure
Configures the oscillator load.
0
1
Oscillator 4 pF Capacitor Load Configure
7
0
External reference clock is inactive.
External reference clock is enabled.
External reference clock is disabled in Stop mode.
External reference clock stays enabled in Stop mode if ERCLKEN is set before entering Stop mode.
Disable the selection.
Add 2 pF capacitor to the oscillator load.
0
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Register name
EREFSTEN
OSCx_CR field descriptions
Table continues on the next page...
0
5
OSCx memory map
Preliminary
0
0
4
Description
SC2P
0
3
(in bits)
Width
8
8
Access
SC4P
R/W
R/W
0
2
Freescale Semiconductor, Inc.
Reset value
SC8P
00h
00h
0
1
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Section/
SC16P
page
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0