mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 655

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

29.4.4 Conversion control
Conversions can be performed as determined by the CFG1[MODE] bits as shown in the
description of CFG1[MODE].
Conversions can be initiated by a software or hardware trigger. In addition, the ADC
module can be configured for low power operation, long sample time, continuous
conversion, hardware average, and automatic compare of the conversion result to a
software determined compare value.
29.4.4.1 Initiating conversions
A conversion is initiated:
If continuous conversions are enabled, a new conversion is automatically initiated after
the completion of the current conversion. In software triggered operation (ADTRG=0),
continuous conversions begin after SC1A register is written and continue until aborted. In
hardware triggered operation (ADTRG=1 and one ADHWTSn event has occurred),
continuous conversions begin after a hardware trigger event and continue until aborted.
If hardware averaging is enabled, a new conversion is automatically initiated after the
completion of the current conversion until the correct number of conversions is
completed. In software triggered operation, conversions begin after SC1A register is
Freescale Semiconductor, Inc.
• Following a write to SC1A register (with ADCH bits not all 1's) if software triggered
• Following a hardware trigger (ADHWT) event if hardware triggered operation is
• Following the transfer of the result to the data registers when continuous conversion
operation is selected (ADTRG=0).
selected (ADTRG=1) and a hardware trigger select event (ADHWTSn) has occurred.
The channel and status fields selected depend on the active trigger select signal
(ADHWTSA active selects SC1A register; ADHWTSn active selects SC1n register;
if neither is active, the off condition is selected).
is enabled (ADCO=1).
Selecting more than one hardware trigger select signal
(ADHWTSn) prior to a conversion completion will result
in unknown results. To avoid this, select only one hardware
trigger select signal (ADHWTSn) prior to a conversion
completion.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Note
Chapter 29 Analog-to-Digital Converter (ADC)
655