mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 660

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional description
29.4.4.6.1 Typical conversion time configuration
A typical configuration for ADC conversion is: 10-bit mode, with the bus clock selected
as the input clock source, the input clock divide-by-1 ratio selected, and a bus frequency
of 8 MHz, long sample time disabled and high speed conversion disabled. The
conversion time for a single conversion is calculated by using
information provided in
variables of
The resulting conversion time is generated using the parameters listed in the proceeding
table. Therefore, for a bus clock equal to 8 MHz and an ADCK equal to 8 MHz the
resulting conversion time is 3.75 µs.
29.4.4.6.2 Short conversion time configuration
A configuration for short ADC conversion is: 8-bit single ended mode with the bus clock
selected as the input clock source, the input clock divide-by-1 ratio selected, a bus
frequency of 20 MHz, long sample time disabled, and high speed conversion enabled.
The conversion time for this conversion is calculated by using
information provided in
variables of
The resulting conversion time is generated using the parameters listed in in the preceding
table. Therefore, for bus clock equal to 20 MHz and ADCK equal to 20 MHz, the
resulting conversion time is 1.45 µs.
660
AverageNum
AverageNum
HSCAdder
HSCAdder
SFCAdder
SFCAdder
LSTAdder
LSTAdder
Variable
Variable
BCT
BCT
Figure
Figure
29-46.
29-46.
Table 29-54
Table 29-54
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table 29-59. Typical conversion time
Table 29-60. Typical conversion time
through
through
Preliminary
5 ADCK cycles + 5 bus clock cycles
5 ADCK cycles + 5 bus clock cycles
Table
Table
20 ADCK cycles
17 ADCK cycles
0 ADCK cycles
29-58. The table below list the
29-58. The table below list the
Time
Time
1
0
0
1
2
Figure 29-46
Figure 29-46
Freescale Semiconductor, Inc.
and the
and the