mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 793

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mcf51jf128

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mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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CPU. If necessary, software should maintain tracking of the current modulation cycle
(primary or secondary). The extended space period ends at the completion of the space
period time of the modulation period during which MSC[EXSPC] bit is cleared.
If MSC[EXSPC] bit was set during a primary modulation cycle, use the equation:
t
Where the subscripts p and s refer to mark and space times for the primary and secondary
modulation cycles.
If MSC[EXSPC] bit was set during a secondary modulation cycle, use the equation:
t
36.8 CMT Interrupts and DMA
The CMT generates an Interrupt request or a DMA transfer request according to
MSC[EOCIE], MSC[EOCF], DMA[DMA] bits.
MSC[EOCF] is set when:
In the case where MSC[MCGEN] bit is cleared and then set before the end of the
modulation cycle, MSC[EOCF] bit will not be set when MSC[MCGEN] is set, but will
become set at the end of the current modulation cycle.
When MSC[MCGEN] becomes disabled, the CMT module does not set the EOC flag at
the end of the last modulation cycle.
Freescale Semiconductor, Inc.
exspace
exspace
• The modulator is not currently active and MSC[MCGEN] bit is set to begin the
• At the end of each modulation cycle (when the counter is reloaded from
initial CMT transmission
CMD1:CMD2) while MSC[MCGEN] bit is set
MSC[EOCF]
= (t
= (t
0
1
1
1
space
space
Table 36-18. DMA Transfer Request x CMT Interrupt Request
)
)
p
s
+ (t
+ (t
mark
mark
DMA[DMA]
MCF51JF128 Reference Manual, Rev. 2, 03/2011
+ t
+ t
X
X
0
1
space
space
)
)
p
s
+ (t
+ (t
mark
mark
Preliminary
MSC[EOCIE]
+ t
+ t
X
0
1
1
space
space
)
)
p
s
+...
+...
Chapter 36 Carrier Modulator Transmitter (CMT)
DMA transfer request
0
0
0
1
CMT interrupt
request
0
0
1
0
793

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