mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1190

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
46.3.1 Port Pulling Enable Register (PCTLx_PUE)
Addresses: PCTLA_PUE is FFFF_9200h base + 0h offset = FFFF_9200h
1190
FFFF_925A
FFFF_9259
Absolute
address
PTPUE[7:0]
(hex)
Reset
Field
Read
7–0
Write
Bit
PCTLB_PUE is FFFF_9210h base + 0h offset = FFFF_9210h
PCTLC_PUE is FFFF_9220h base + 0h offset = FFFF_9220h
PCTLD_PUE is FFFF_9230h base + 0h offset = FFFF_9230h
PCTLE_PUE is FFFF_9240h base + 0h offset = FFFF_9240h
PCTLF_PUE is FFFF_9250h base + 0h offset = FFFF_9250h
Reserved
Reserved
Port internal pulling enable bits
Each pin has a pullup and pulldown resistor associated with it. For port pins that are not configured as
inputs, these bits have no effect and the internal pull resistors are disabled.
If there is no special note or description for the module that controls the pin whether a pulling resistor is
enabled for the module, it is decided by the associated PUE bit.
0
1
7
0
Pulling resistor is disabled.
Pulling resistor is enabled.
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Register name
PCTL memory map (continued)
PCTLx_PUE field descriptions
0
5
Preliminary
0
4
PTPUE[7:0]
Description
0
3
(in bits)
Width
Access
0
2
Freescale Semiconductor, Inc.
Reset value
0
1
Section/
46.3.10/
46.3.11/
page
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0