mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 599

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mcf51jf128

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mcf51jf128
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Mcf51jf128 Reference Manual
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Freescale Semiconductor, Inc
Datasheet

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26.6.3.11 AES Substitution (AESS)
The AESS command performs the AES byte substitution operation on CAx and stores the
result back to CAx.
26.6.3.12 AES Inverse Substitution (AESIS)
The AESIS command performs the AES inverse byte substitution operation on CAx and
stores the result back to CAx.
26.6.3.13 AES Column Operation (AESC)
The AESC command performs the AES column operation on the contents of CAx then
performs an exclusive-or of that result with the source operand specified by <ea> and
stores the result in CAx.
26.6.3.14 AES Inverse Column Operation (AESIC)
The AESIC command performs an exclusive-or operation of the source operand specified
by <ea> on the contents of CAx followed by the AES inverse mix column operation on
that result and stores the result back in CAx.
26.6.3.15 AES Shift Rows (AESR)
The AESR command performs the AES shift rows operation on registers CA0, CA1,
CA2, and CA3. This table shows an example.
Freescale Semiconductor, Inc.
cp0ld.l
cp0ld.l
cp0ld.l
cp0ld.l
cp0ld.l
Register
CA0
#AESS+CAx
#AESIS+CAx
<ea>,#AESC+CAx
<ea>,#AESIC+CAx
#AESR
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Table 26-16. AESR Command Example
Table continues on the next page...
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Preliminary
Before
Chapter 26 Cryptographic Acceleration Unit (CAU)
0x0106_0B00
After
599

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