mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 407

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

18.5.2 Low Voltage Detect Status and Control 2 Register
This register contains status and control bits to support the low voltage warning function.
While the device is in the very low power or low leakage modes, the LVD system is
disabled regardless of LVDSC2 settings.
See the device's data sheet for the exact LVD trip voltages.
Address: PMC_LVDSC2 is FFFF_8100h base + 1h offset = FFFF_8101h
Freescale Semiconductor, Inc.
Reserved
LVDRE
LVDV
Field
Reset
3–2
1–0
Read
Write
4
Bit
(PMC_LVDSC2)
LVWF
The LVW trip voltages depend on LVWV and LVDV bits.
The LVWV bits are reset solely on a POR Only event. The
register's other bits are reset on Chip Reset not VLLS. For more
information about these reset types, refer to the
Low-Voltage Detect Reset Enable
This write-once bit enables LVDF events to generate a hardware reset. Additional writes are ignored.
0
1
This read-only bitfield is reserved and always has the value zero.
Low-Voltage Detect Voltage Select
Selects the LVD trip point voltage (V
00
01
10
11
7
0
LVDF does not generate hardware resets
Force an MCU reset when LVDF = 1
Low trip point selected (V LVD = V LVDL )
High trip point selected (V LVD = V LVDH )
Reserved
Reserved
LVWACK
PMC_LVDSC1 field descriptions (continued)
0
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
LVWIE
0
5
Preliminary
LVD
NOTE
NOTE
).
0
4
Description
Chapter 18 Power Management Controller (PMC)
0
0
3
Reset
0
2
details.
0
1
LVWV
0
0
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