mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 842

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional Description
37.4.3.2 Up-Down Counting
Up-down counting is selected when (CPWMS = 1) and, if the quadrature decoder feature
is supported, when (QUADEN = 0).
CNTINH:L defines the starting value of the count and MODH:L defines the final value
of the count. The value of CNTINH:L is loaded into the FTM counter, and the counter
increments until the value of MODH:L is reached, at which point the counter is
decremented until it returns to the value of CNTINH:L and the up-down counting
restarts.
The FTM period when using up-down counting is 2 × (MODH:L – CNTINH:L) × period
of the FTM counter clock.
The TOF bit is set when the FTM counter changes from MODH:L to (MODH:L – 1).
If (CNTINH:L = 0x0000), the FTM counting is equivalent to TPM up-down counting
(that is, up-down and unsigned counting) (see the following figure).
842
Figure 37-147. Example of Up Counting When the Value of CNTIN Registers Is Greater
CNTINH:L = 0x0015
FTM counting is up
MODH:L = 0x0005
FTM counter
TOF bit
0x0005 0x0015 0x0016
load of CNTINH:L
set TOF bit
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Than the Value of MOD Registers
...
0xFFFE 0xFFFF 0x0000 0x0001 0x0002 0x0003 0x0004 0x0005 0x0015 0x0016
Preliminary
Freescale Semiconductor, Inc.
load of CNTINH:L
set TOF bit
...