mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 305

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Address: SIM_SDIDH is FFFF_80C0h base + 10h offset = FFFF_80D0h
13.2.12 Device Identification Low Register (SIM_SDIDL)
Together, the SDIDH and SDIDL registers contain the 12 ID bits that specify the device
identification number set by the IFR bits, whose values replace the default reset values.
The bit encodings for all 12 ID bits correspond to the three LSBs in the IFR, which is a
range from D01h to D07h (110100000001b to 110100000111b).
Address: SIM_SDIDL is FFFF_80C0h base + 11h offset = FFFF_80D1h
* Notes:
•
Freescale Semiconductor, Inc.
ID[7:0] bitfield:Refer to this bitfield's description for its value, which is set by IFR bits.
ID[11:8]
ID[7:0]
Reset
Field
REV
Reset
Field
Read
7–4
3–0
Read
7–0
Write
Write
Bit
Bit
The following Reset row refers to Chip POR. Only that type of
reset, or any reset type that triggers Chip POR, affects this
register. Other reset types do not affect this register.
Device Revision Number
Specifies the silicon implementation number for the device. This value comes from plugs, not IFR bits.
Device identification number
Specifies the device identification number as set by the IFR bits. For information about the bit encodings
for this field, see the description of the SDIDL register.
Device identification number
Specifies the device identification number as set by the IFR bits, whose values replace the default reset
values. The bit encodings for bits 2-0 specify the ColdFire+ family of which the chip is a member.
7
0
7
*
0
6
6
*
MCF51JF128 Reference Manual, Rev. 2, 03/2011
REV
SIM_SDIDH field descriptions
SIM_SDIDL field descriptions
0
5
5
*
Preliminary
NOTE
0
4
4
*
Description
Description
ID[7:0]
1
3
3
*
Chapter 13 System Integration Module (SIM)
1
2
2
*
ID[11:8]
0
1
1
*
1
0
0
*
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