mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 820

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Register Definition
Addresses: FTM0_SYNC is FFFF_8440h base + 21h offset = FFFF_8461h
820
SWSYNC
TRIG2
TRIG1
Reset
Field
Read
Write
7
6
5
Bit
FTM1_SYNC is FFFF_8480h base + 21h offset = FFFF_84A1h
SWSYNC
The software trigger (SWSYNC bit) and hardware triggers
(TRIG0, TRIG1, and TRIG2 bits) have a potential conflict if
used together. It is recommended using only hardware or
software triggers but not both at the same time, otherwise
unpredictable behavior is likely to happen.
The selection of the boundary cycle (CNTMAX and CNTMIN
bits) is intended to provide the update of MOD, CNTIN, and
CV across all enabled channels simultaneously. The use of the
boundary cycle selection together with TRIG0, TRIG1, or
TRIG2 bits is likely to result in an unpredictable behavior.
The MODE[PWMSYNC] bit determines which type of trigger
event controls the functions enabled by the SYNC register.
PWM Synchronization Software Trigger
Selects the software trigger as the PWM synchronization trigger. The software trigger happens when a 1
is written to SWSYNC bit.
0
1
PWM Synchronization External Trigger 2
Selects external trigger 2 as the PWM synchronization trigger. External trigger 2 happens when the FTM
detects a rising edge in the trigger 2 input signal.
0
1
PWM Synchronization External Trigger 1
Selects external trigger 1 as the PWM synchronization trigger. External trigger 1 happens when the FTM
detects a rising edge in the trigger 1 input signal.
7
0
Software trigger is not selected.
Software trigger is selected.
External trigger 2 is not selected.
External trigger 2 is selected.
TRIG2
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
FTMx_SYNC field descriptions
Table continues on the next page...
TRIG1
0
5
Preliminary
NOTE
TRIG0
0
4
Description
SYNCHOM
0
3
REINIT
0
2
Freescale Semiconductor, Inc.
CNTMAX
0
1
CNTMIN
0
0