mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 266

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mcf51jf128

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mcf51jf128
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Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Processor Exceptions
11.3.4.5 Miscellaneous Instruction Execution Times
1. If a MOVE.W #imm,SR instruction is executed and imm[13] equals 1, the execution time is 1(0/0).
2. The n is the number of registers moved by the MOVEM opcode.
3. PEA execution times are the same for (d16,PC).
4. PEA execution times are the same for (d8,PC,Xn*SF).
5. The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.
266
MOVEM.L
MOVEM.L
MOV3Q.L
WDEBUG
WDDATA
MOVE.W
MOVE.W
MOVE.W
MOVE.W
STLDSR
MOVE.L
MOVE.L
MOVEC
Opcode
LINK.W
PULSE
TPF.W
STOP
TRAP
TPF.L
UNLK
MVS
MVZ
NOP
PEA
TPF
<ea>,CCR
#imm,<ea
<ea>,and
<ea>,SR
Ay,#imm
CCR,Dx
list,<ea>
<ea>,Dx
<ea>,Dx
Ay,USP
USP,Ax
SR,Dx
Ry,Rc
#imm
#imm
#imm
<EA>
<ea>
<ea>
<ea>
and
list
Ax
>
Table 11-29. Miscellaneous Instruction Execution Times
7 (0/0)
9 (0/1)
3 (0/0)
2 (1/0)
2(0/1)
1(0/0)
3(0/0)
3(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
Rn
MCF51JF128 Reference Manual, Rev. 2, 03/2011
1+ n(n/0)
1+ n(0/n)
2 (1/0)
2 (1/0)
2 (0/1)
3 (1/0)
5 (2/0)
1(0/1)
(An)
2
2 (1/0)
2 (1/0)
3 (1/0)
1(0/1)
(An)+
Preliminary
2 (1/0)
2 (1/0)
3 (1/0)
1(0/1)
-(An)
Effective Address
1+ n(n/0)
1+ n(0/n)
(d16,An)
2 (0/1)
2 (1/0)
2 (1/0)
3 (1/0)
5 (2/0)
1(0/1)
3
(d8,An,Xn*SF
3 (0/1)
3 (1/0)
3 (1/0)
4 (1/0)
2(0/1)
)
Freescale Semiconductor, Inc.
4
xxx.wl
2 (1/0)
2 (1/0)
2 (0/1)
3 (1/0)
1(0/1)
7 (0/0)
3 (0/0)
13 (1/2)
1(0/0)
1(0/0)
1(0/0)
5(0/1)
#xxx
1
5

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