mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 891

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

enable the measurement of next period. The CH(n)F bit is set when the first rising edge is
detected, that is, the edge selected by ELS(n)B:ELS(n)A bits. The CH(n+1)F bit is set
and DECAP bit is cleared when the second rising edge is detected, that is, the edge
selected by ELS(n+1)B:ELS(n+1)A bits. Both DECAP and CH(n+1)F bits indicate when
two selected edges were captured and the C(n)VH:L and C(n+1)VH:L registers are ready
for reading.
The following figure shows an example of the dual edge capture – continuous mode used
to measure the period between two consecutive rising edges. The DECAPEN bit selects
the dual edge capture mode, so it keeps set in all operation mode. While the DECAP bit
is set the configured measurements are made. The CH(n)F bit is set when the first rising
edge is detected, that is, the edge selected by ELS(n)B:ELS(n)A bits. The CH(n+1)F bit
Freescale Semiconductor, Inc.
Figure 37-213. Dual Edge Capture – One-Shot Mode to Measure of the Period Between
Note
- The commands set DECAPEN, set DECAP, clear CH(n)F, and clear CH(n+1)F are made by the user.
- Problem 1: channel (n) input = 0, set DECAP, not clear CH(n)F, and not clear CH(n+1)F.
- Problem 2: channel (n) input = 1, set DECAP, not clear CH(n)F, and clear CH(n+1)F.
- Problem 3: channel (n) input = 1, set DECAP, not clear CH(n)F, and not clear CH(n+1)F.
channel (n) input
DECAPEN bit
(after the filter
channel input)
CH(n+1)F bit
DECAP bit
FTM counter
C(n+1)VH:L
CH(n)F bit
C(n)VH:L
clear CH(n+1)F
set DECAPEN
clear CH(n)F
set DECAP
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MCF51JF128 Reference Manual, Rev. 2, 03/2011
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Two Consecutive Rising Edges
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problem 1
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Preliminary
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problem 2
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Chapter 37 FlexTimer (FTM)
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problem 3
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