mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 304

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Memory Map and Registers
13.2.11 Device Identification High Register (SIM_SDIDH)
Together, the SDIDH and SDIDL registers contain the 12 ID bits that specify the device
identification number set by the IFR bits.
For a definition of the bit encodings for the ID bits in these registers, see the bit
encodings for the SDIDL register.
304
OSC1RANGE
OSC1EREFS
OSC1HGO
Reserved
Reserved
Reserved
OSC1EN
Field
4–3
7
6
5
2
1
0
The following Reset row refers to Chip POR. Only that type of
reset, or any reset type that triggers Chip POR, affects this
register. Other reset types do not affect this register.
Oscillator 1 enable
Enables oscillator 1.
0
1
This read-only bit is reserved and always has the value zero.
This read-only bit is reserved and always has the value zero.
Frequency range select
Selects the frequency range for the crystal oscillator or external clock source. For details, refer to the OSC
chapter.
00
01
1x
High gain oscillator select
Controls the crystal oscillator mode of operation. For details, refer to the OSC chapter.
0
1
External reference select
Selects the source for the external reference clock. Refer to the OSC chapter for details.
0
1
This read-only bit is reserved and always has the value zero.
Oscillator 1 inactive.
Oscillator 1 active.
Configure crystal oscillator for low-power operation.
Configure crystal oscillator for high-gain operation.
External reference clock requested.
Oscillator requested.
Encoding 0: Low frequency range for the crystal oscillator of 32 kHz to 40 kHz (reset default).
Encoding 1: High frequency range selected for the crystal oscillator of 1 MHz to 8 MHz.
Encoding 2: Very high frequency range selected for the crystal oscillator of 8 MHz to 32 MHz.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
SIM_OSC1 field descriptions
Preliminary
NOTE
Description
Freescale Semiconductor, Inc.