mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 914

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Register Definition
38.3.3 SPI baud rate register (SPIx_BR)
Use this register to set the prescaler and bit rate divisor for an SPI master. This register
may be read or written at any time.
Addresses: SPI0_BR is FFFF_81A0h base + 2h offset = FFFF_81A2h, SPI1_BR is FFFF_81B0h base + 2h offset = FFFF_81B2h
914
SPPR[2:0]
RXDMAE
Reserved
SPISWAI
SPC0
Field
Reset
Field
Read
6–4
Write
2
1
0
7
Bit
0
1
Receive DMA enable
This is the enable bit for a receive DMA request. When this bit is set to 1, a receive DMA request is
asserted when both SPRF and SPE are set, and the interrupt from SPRF is disabled.
0
1
SPI stop in wait mode
This bit is used for power conservation while the device is in wait mode.
0
1
SPI pin control 0
This bit enables bidirectional pin configurations.
0
1
This read-only bit is reserved and always has the value zero.
SPI baud rate prescale divisor
7
0
0
Output driver disabled so SPI data I/O pin acts as an input
SPI I/O pin enabled as an output
DMA request for receive is disabled and interrupt from SPRF is allowed
DMA request for receive is enabled and interrupt from SPRF is disabled
SPI clocks continue to operate in wait mode
SPI clocks stop when the MCU enters wait mode
SPI uses separate pins for data input and data output (pin mode is normal). In master mode of
operation: MISO is master in and MOSI is master out.In slave mode of operation: MISO is slave out
and MOSI is slave in.
SPI configured for single-wire bidirectional operation (pin mode is bidirectional). In master mode of
operation: MISO is not used by SPI; MOSI is master in when BIDIROE is 0 or master I/O when
BIDIROE is 1.In slave mode of operation: MISO is slave in when BIDIROE is 0 or slave I/O when
BIDIROE is 1; MOSI is not used by SPI.
0
6
MCF51JF128 Reference Manual, Rev. 2, 03/2011
SPI0_C2 field descriptions (continued)
SPPR[2:0]
SPI0_BR field descriptions
Table continues on the next page...
0
5
Preliminary
0
4
Description
Description
0
3
0
2
SPR[3:0]
Freescale Semiconductor, Inc.
0
1
0
0