mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 182

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Port Mux Control Features
9.3 Port Mux Control Features
Package pins can be programmed for up to sixteen different functions using the mux
control registers. Controls are organized by GPIO port. Each GPIO port has four mux
control registers, consisting of 4 bits per package pin. All mux registers reset to 00h.
Alternate values for each function match the column number in which that function
occurs in the pin summary table. That is, default functions are assigned value 00h, ALT1
functions 01h, and so on. Setting the RESERVED setting in the port muxing results in the
DEFAULT function for the pin.
182
0x(FF)FF
0x(FF)FF
0x(FF)FF
0x(FF)FF
0x(FF)FF
0x(FF)FF
0x(FF)FF
Address
_8080
_8081
_8082
_8083
_8084
_8085
_8086
Register access
Clocking
Topic
Peripher
MXC
MXC
MXC
MXC
MXC
MXC
MXC
al
Not all pins described in the port mux are available on every
package in the device family. Do not change the port mux
control field for pins that do not appear on the device in use.
For example, in a 32-pin package, mask the PTCPF1[C6] field
when writing to the PTCPF1 register. Changing the port mux
control field for such unavailable pins can generate unnecessary
current leakage.
Table 9-1. Reference links to related information (continued)
Register
PTAPF1
PTAPF2
PTAPF3
PTAPF4
PTBPF1
PTBPF2
PTBPF3
Peripheral Bridge
Related module
Table 9-2. Port mux control registers overview
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Bit 7
Table continues on the next page...
6
CAUTION
A7
A5
A3
A1
B7
B5
B3
Preliminary
5
4
Clock distribution
Reference
3
Freescale Semiconductor, Inc.
2
A6
A4
A2
A0
B6
B4
B2
1
Bit 0