mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 280

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional Description
12.3 Functional Description
The MAC speeds execution of ColdFire integer-multiply instructions (MULS and
MULU) and provides additional functionality for multiply-accumulate operations. By
executing MULS and MULU in the MAC, execution times are minimized and
deterministic compared to the 2-bit/cycle algorithm with early termination that the OEP
normally uses if no MAC hardware is present.
The added MAC instructions to the ColdFire ISA provide for the multiplication of two
numbers, followed by the addition or subtraction of the product to or from the value in an
accumulator. Optionally, the product may be shifted left or right by 1 bit before addition
or subtraction. Hardware support for saturation arithmetic can be enabled to minimize
software overhead when dealing with potential overflow conditions. Multiply-accumulate
operations support 16- or 32-bit input operands in these formats:
The EMAC is optimized for single-cycle, pipelined 32 × 32 multiplications. For word-
and longword-sized integer input operands, the low-order 40 bits of the product are
formed and used with the destination accumulator. For fractional operands, the entire 64-
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ACC2U
ACC3U
ACC2L
ACC3L
31–24
23–16
• Signed integers
• Unsigned integers
• Signed, fixed-point, fractional numbers
15–8
Field
7–0
Reset
W
R
Accumulator 2 upper extension byte
Accumulator 2 lower extension byte
Accumulator 3 upper extension byte
Accumulator 3 lower extension byte
Description
Table 12-11. Accumulator Extension Register (ACCext23) (continued)
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Table 12-12. ACCext23 Field Descriptions
MCF51JF128 Reference Manual, Rev. 2, 03/2011
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ACC3U
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Preliminary
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ACC3L
Freescale Semiconductor, Inc.
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