mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 768

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mcf51jf128

Manufacturer Part Number
mcf51jf128
Description
Mcf51jf128 Reference Manual
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Functional description
input source remains asserted for at least 2
edges, then the glitch filter output will also assert. Note that the input is only sampled on
the rising clock edge.
The LPTMR counter register will increment each time the glitch filter output asserts. In
pulse counter mode, the maximum rate at which the LPTMR counter register can
increment is once every 2
filter will wait an additional one or two prescaler clock edges due to synchronization
logic.
35.4.3.4 Glitch filter bypassed
In pulse counter mode when the glitch filter is bypassed, the selected input source
increments the LPTMR counter register every time it asserts. Before the LPTMR is first
enabled, the selected input source is forced to asserted. This is to prevent the LPTMR
counter register from incrementing if the selected input source is already asserted when
the LPTMR is first enabled.
35.4.4 LPTMR compare
When the LPTMR counter register equals the value of the LPTMR compare register and
increments, the following events occur:
When the LPTMR is enabled, the LPTMR compare register can only be altered when the
timer compare flag is set. When updating the LPTMR compare register, the LPTMR
compare register must be written and the timer compare flag must be cleared before the
LPTMR counter has incremented past the new LPTMR compare value.
35.4.5 LPTMR counter
The LPTMR counter register increments by one on every:
768
• Timer compare flag is set
• LPTMR interrupt is generated if Timer Interrupt Enable is also set
• LPTMR hardware trigger is generated
• LPTMR counter register is reset if the free running counter bit is clear
• prescaler clock (time counter mode with prescaler bypassed)
• prescaler output (time counter mode with prescaler enabled)
• input source assertion (pulse counter mode with glitch filter bypassed)
• glitch filter output (pulse counter mode with glitch filter enabled).
MCF51JF128 Reference Manual, Rev. 2, 03/2011
2
to 2
16
prescaler clock edges. When first enabled, the glitch
Preliminary
1
to 2
15
consecutive prescaler clock rising
Freescale Semiconductor, Inc.

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