mcf51jf128 Freescale Semiconductor, Inc, mcf51jf128 Datasheet - Page 1316

• Manufacturer Part Number: mcf51jf128
• Description: Mcf51jf128 Reference Manual
• Manufacturer: Freescale Semiconductor, Inc

Functional Description
The default state of the protocol, after reset, is hardware handshake protocol disabled.
The commands that do not require CPU execution, or that have the status register
included in the retrieved bit stream, do not perform the hardware handshake protocol.
Therefore, the target does not respond with an ACK pulse for those commands even if the
hardware protocol is enabled. Conversely, only commands that require CPU execution
and do not include the status byte perform the hardware handshake protocol. See the third
column in
An exception is the ACK_ENABLE command, which does not require CPU execution
but responds with the ACK pulse. This feature can be used by the host to evaluate if the
target supports the hardware handshake protocol. If an ACK pulse is issued in response to
this command, the host knows that the target supports the hardware handshake protocol.
If the target does not support the hardware handshake protocol the ACK pulse is not
issued. In this case, the ACK_ENABLE command is ignored by the target, because it is
not recognized as a valid command.
50.4.2 Real-Time Debug Support
The ColdFire family supports debugging real-time applications. For these types of
embedded systems, the processor must continue to operate during debug. The foundation
of this area of debug support is that while the processor cannot be halted to allow
debugging, the system can generally tolerate the small intrusions with minimal effect on
real-time operation.
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• ACK_ENABLE — Enables the hardware handshake protocol. The target issues the
• ACK_DISABLE — Disables the ACK pulse protocol. In this case, the host should
ACK pulse when a CPU command is executed. The ACK_ENABLE command itself
also has the ACK pulse as a response.
verify the state of XCSR[CSTAT] to evaluate if there are pending commands and to
check if the CPU's operating state has changed to or from active background mode
via XCSR[31–30].
Table 50-40
The details regarding real-time debug support will be supplied
at a later time.
for the complete enumeration of this function.
MCF51JF128 Reference Manual, Rev. 2, 03/2011
Preliminary
Note
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